1. Field of the Invention
This invention relates to a capacitor, more particularly to a capacitor with a geometrical layout of a grid of first conductive posts and a plurality of second conductive posts disposed respectively in lattices of the grid.
2. Description of the Related Art
FIG. 1 illustrates a conventional capacitor that includes a dielectric layer 13 sandwiched between first and second external electrodes 11, 12. The capacitance of the conventional capacitor depends on the areas of the first and second external electrodes 11, 12, the distance between the first and second external electrodes 11, 12, and the material of the dielectric layer 13. Particularly, the larger the areas of the first and second external electrodes 11, 12, or the smaller the distance between the first and second external electrodes 11, 12, the higher will be the capacitance.
The conventional capacitor is disadvantageous in that enlarging the areas of the first and second external electrodes 11, 12 for increasing the capacitance of the capacitor results in an undesired increase in the size of the capacitor, which contradicts the current trend in the manufacturing industry for miniaturization of electronic or electrical devices, and that reducing the distance between the first and second external electrodes 11, 12 for increasing the capacitance of the capacitor results in a complex manufacturing process and a considerable increase in manufacturing cost.